Filled Via vs Copper Cap Via
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Filled Via vs Copper Cap Via – HDI Via‑in‑Pad Reliability and Manufacturing Tradeoffs
Unfilled via‑in‑pad caused BGA assembly failures
A high‑density FPGA board used via‑in‑pad (VIP) for a 0.8 mm pitch BGA without any filling. During assembly, solder paste wicked into the via cavity, causing insufficient solder volume under the BGA ball. The result: head‑in‑pillow defects and open joints. After switching to copper‑capped vias (filled and plated over), the solder volume was consistent and the head‑in‑pillow rate dropped from 8% to <0.1%. The lesson: via‑in‑pad without filling (or at least a copper cap) is unacceptable for BGA assembly. Specify filled or copper‑capped vias under any component.
Filled Via vs Copper Cap – Different Approaches, Same Goal
Both methods enable via‑in‑pad (VIP) by providing a flat, solderable surface. But the process, reliability, and cost differ significantly.
| Parameter | Filled Via (Non‑Conductive Fill) | Copper Cap Via (Plated‑Over) |
|---|---|---|
| Definition | Via filled with non‑conductive epoxy, then surface plated (cap not always required) | Via filled (conductive or non‑conductive) then electroplated with copper to create a solid cap |
| Fill material | Non‑conductive epoxy (e.g., San-Ei, Taiyo) | Conductive copper (plated) over any fill material |
| Flatness after processing | Good (requires planarization after fill) | Excellent (copper cap is plated and lapped flat) |
| Solderability | Good (surface finish required) | Excellent – copper cap can be finished like any pad |
| Thermal cycle reliability | Moderate (500‑1000 cycles) | High (1000‑2000 cycles) |
| Risk of voiding under cap | Low – no cap edge | Moderate – trapped air under cap if fill is incomplete |
| Cost (relative to no‑fill) | +30‑50% | +50‑80% |
| Typical application | BGA via‑in‑pad where thermal cycling <1000 cycles, cost‑sensitive HDI | High‑reliability (automotive, aerospace), stacked microvias, >1000 thermal cycles |
Key insight: A copper cap (plated‑over) via is always more reliable than a non‑conductive filled via without a cap. The copper cap adds mechanical strength and prevents solder wicking. For any mission‑critical application, specify copper‑capped vias under components.
Process Comparison – How Each Is Made
Filled Via (Non‑Conductive Epoxy)
- Laser drill microvia
- Desmear to clean residue
- Fill with non‑conductive epoxy (screen printing or vacuum fill)
- Cure epoxy
- Planarize (grind) to remove excess epoxy
- Electroless copper + pattern plating (cap is not guaranteed – many suppliers leave filled via un‑capped unless specified)
Copper Cap Via (Plated‑Over)
- Laser drill microvia
- Desmear
- Fill (conductive copper plating directly, or non‑conductive fill then copper plate – the key is that the via is fully plated over)
- Planarize (if fill was non‑conductive)
- Additional copper plating to build cap thickness (typically ≥12 µm over the via)
- Surface finish (ENIG, ENEPIG, etc.) applied over copper cap
Critical requirement: Always request microsection of a sample via to verify cap thickness (>12 µm) and absence of voids under the cap. Many suppliers claim "copper‑filled" but actually use non‑conductive fill without a cap – specify clearly.
Reliability Data – Thermal Cycle Performance
Based on IPC‑TR‑579 and in‑house testing (20+ HDI builds), the following thermal cycle life estimates are typical for 0.1 mm microvias under -40/+125°C cycling.
| Structure | Typical Cycles to Failure (B10) | Failure Mode | Recommendation |
|---|---|---|---|
| Unfilled via‑in‑pad (no cap) | 200‑400 | Solder wicking, pad cratering | Not acceptable for any assembly – avoid entirely. |
| Non‑conductive fill, no cap (just planarized) | 500‑800 | Crack at fill‑copper interface | Acceptable for Class 2 / consumer with ≤500 cycles. |
| Non‑conductive fill + copper cap (plated‑over) | 1200‑1800 | Cap edge crack, rare under 1000 cycles | Preferred for Class 3, automotive, medical. |
| Copper‑filled (conductive) + copper cap | 1500‑2500+ | Minimal – very robust | Best for aerospace, high‑reliability, stacked microvias. |
When to Specify Which – Decision Matrix
- Use non‑conductive fill (no cap) if: cost‑sensitive consumer, <500 thermal cycles, via not under component, and assembly does not require via‑in‑pad.
- Use non‑conductive fill + copper cap if: via‑in‑pad under BGA, Class 2/3, 500‑1000 thermal cycles, cost moderate.
- Use copper‑filled + copper cap if: stacked microvias, >1000 thermal cycles, automotive under‑hood, aerospace, medical implant, or any reliability‑critical application.
Qualification Requirements – Microsection and Thermal Stress
To qualify filled or copper‑capped vias, we require the following IPC‑TM‑650 tests:
- Microsection (2.1.1) – Check fill completeness, cap thickness (≥12 µm), absence of voids under cap, and planarization quality. Sample 5 vias per panel.
- Thermal cycling (2.6.7) – Perform 1000 cycles (-40/+125°C) for capped vias, 500 cycles for non‑capped. Post‑stress microsection (same vias). Accept if no cracks >10% of copper thickness.
- Thermal stress (2.6.8) – Solder float 288°C, 20s. Inspect for blistering or cap separation.
- Solderability (2.4.14) – Edge dip after steam aging (2.6.1). Ensure no non‑wetting over capped area.
Supplier Audit Checklist – Via Filling and Capping Capability
- Does the supplier offer both non‑conductive fill and copper cap (plated‑over) options? Do they clearly differentiate in quotes?
- What is their standard cap thickness? (We require ≥12 µm, measured from the top of the pad.)
- Do they perform planarization after fill? What is their planarization tolerance? (We require ±5 µm flatness.)
- Do they have microsection capability to inspect voiding under the cap? Ask for sample microsection images.
- Can they provide thermal cycle test data for your specific structure (filled vs capped) for 1000+ cycles?
Related Engineering Resources
Frequently Asked Questions
A> For BGA assembly, yes – or at least a filled via with a flat surface. Unfilled vias cause solder wicking and insufficient joint volume. Copper cap is the most reliable option.
A> Yes for non‑component areas, but under BGAs, the fill alone may not be flat enough and can still wick solder if the cap is missing. Always specify "filled and plated‑over" for vias under components.
A> IPC‑6012 does not specify. We require ≥12 µm measured from the top of the original pad. Thinner caps (<8 µm) risk cracking under thermal stress.
A> Yes – typically 20‑30% more than non‑conductive fill only, and 50‑80% more than unfilled vias. For high‑reliability, the added cost is justified.
A> Require microsection (2.1.1) on a sample via per panel (or per lot for high volume). Measure cap thickness, check for voids, and ensure no copper separation from the underlying fill.
Reference standards: IPC‑6012 Class 3, IPC‑TM‑650 (2.1.1, 2.6.7, 2.6.8, 2.4.14), IPC‑7095 (BGA), IPC‑TR‑579 (microvia reliability).
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