High‑Frequency PCB Supplier Checklist: 5 Must‑Verify Data Points

2026-05-25


Engineering Summary

Five measured data points separate high‑frequency PCB suppliers who truly control their process from those who only claim capability.

You must verify:

  • 1) Dk/Df lot‑acceptance data
  • 2) Copper roughness (Ra) on RF layers
  • 3) Δ‑Loss coupon results
  • 4) Impedance distribution (Cp/Cpk)
  • 5) Thermal cycling / CAF test reports

Rule of thumb: A supplier that cannot provide measured data for all five cannot guarantee repeatable RF performance across production lots.

Why a checklist, not a marketing tour

Every high‑frequency PCB supplier claims “tight impedance,” “low loss,” and “high reliability.” But when production boards drift, the cost of failure lands on you – not them.

This checklist replaces trust with verification. Use it before you release prototypes, qualify a new vendor, or scale to volume.

1. Dk/Df lot‑acceptance data (material stability)

Why it matters: Laminate Df variation of just ±0.001 adds ≈0.15 dB/cm loss at 28GHz. Datasheet Dk/Df are typical values at 10 GHz – your production lot may differ.

What to ask for:

  • Incoming test report per lot using T‑resonator or split‑post resonator (IPC‑TM‑650‑2.5.5.13)
  • Dk and Df at your operating frequency (e.g., 28GHz or 77GHz), not only 10GHz
  • Lot traceability to your production panels
ParameterClass 2 (commercial RF)Class 3 (automotive/defense)
Dk lot variation±0.05±0.02
Df lot variation±0.0008±0.0004

Common supplier gap: “We use Rogers material – it’s already qualified.” 
Reality: Rogers qualifies the material, not your supplier’s lot handling. Always demand lot‑specific data.

2. Copper roughness (Ra) on RF layers

Why it matters: At 28‑77GHz, skin depth is 0.23‑0.39 µm. Standard ED copper (Ra ≈2.0 µm) can increase loss by 30‑50% vs HVLP.

What to ask for:

  • Profilometry measurement (ISO 25178) for each production lot
  • Ra (arithmetical mean height) and Rz (average max height) on RF layers
  • Statement that HVLP or VLP copper is used, not left to “fabricator’s choice”
Copper typeRa max (µm)Suitable for
HVLP / VLP0.677GHz radar, 28GHz 5G
RTF0.8mmWave prototypes
Low‑profile ED1.2<20GHz
Standard ED2.0reject for mmWave RF layers

Common supplier gap: “We use low‑loss copper.” 
Reality: “Low‑loss” is not a specification. Demand Ra numbers and verify with profilometry.

3. Δ‑Loss coupon results (measured insertion loss)

Why it matters: Impedance coupons confirm geometry – they do not measure loss. Δ‑Loss coupons (IPC‑TM‑650‑2.5.5.13) remove connector and launch effects, giving true PCB‑only loss.

What to ask for:

  • Δ‑Loss coupon data for each critical RF layer and line type
  • Loss per cm (or per inch) at your operating frequency
  • Panel‑to‑panel and lot‑to‑lot variation statistics
FrequencyTarget loss (dB/cm)Max allowed (dB/cm)
28GHz (microstrip, low‑loss material)0.50.6
77GHz (microstrip, RO3003 + HVLP)0.350.45
112G PAM4 (stripline, Megtron 6)N/A<1.0 total per channel

Common supplier gap: “We test impedance and it passes.” 
Reality: Impedance passing does not guarantee loss. Demand Δ‑Loss data or prepare for surprises.

4. Impedance distribution (Cp/Cpk) – not just min/max

Why it matters: A single impedance reading or “within ±10%” claim hides distribution tails. Cp/Cpk tells you how consistently the supplier holds target impedance across panels and lots.

What to ask for:

  • TDR measurement data from at least 30 panels (or statistically significant sample)
  • Cp and Cpk values for each controlled impedance net group
  • Upper and lower specification limits (USL/LSL) and process mean
RequirementCpCpk
Minimum acceptable1.00.9
Preferred for high‑reliability1.331.2
Excellent (automotive/defense)1.671.5

Common supplier gap: “Our impedance is within ±10%.” 
Reality: A process can be within ±10% but have Cp=0.8 – meaning 5‑10% of boards may fail after shipment. Demand Cp/Cpk, not just range.

5. Thermal cycling / CAF test reports (long‑term reliability)

Why it matters: High‑frequency PCBs often operate in harsh environments (‑40°C to +125°C, high humidity). Without thermal cycling and CAF testing, you have no proof of long‑term reliability.

What to ask for:

  • Thermal cycling report (IPC‑6018 Class 3 or equivalent) – cycles, temperature range, resistance monitoring
  • CAF test report (IPC‑TM‑650‑2.6.25) – spacing, voltage, temperature/humidity, time to failure
  • Cross‑section images of microvias and plated through‑holes after stress
TestRequirementTypical condition
Thermal cyclingNo open, resistance drift <10%1000 cycles, -40°C to +125°C
CAFIR > 10⁸ Ω500‑1000h, 85°C/85% RH, 50‑100V bias
Microsection after stressNo cracks, no separation200× magnification

Common supplier gap: “We follow IPC‑6012.” 
Reality: IPC‑6012 Class 2 does not require thermal cycling or CAF testing for many structures. Demand reports, not certifications.

Supplier response evaluation table

Data pointAcceptable responseRed flag (walk away)
Dk/Df lot dataReport with lot numbers and measured values“We trust the supplier”
Copper roughnessRa <0.6µm on RF layers, profilometry report“We use standard copper”
Δ‑Loss couponData at your frequency, panel‑to‑panel spread“We only do impedance”
Impedance Cp/CpkCp≥1.33, Cpk≥1.2, 30+ panel sample“Min/max only”
Thermal cycling/CAFReports with test conditions and results“Not required for your design”

How to use this checklist in procurement

  1. Before quoting: Ask for existing data from similar designs (same material, layer count, frequency band).
  2. During prototype phase: Require that all five data points be measured on the first article.
  3. Before volume production: Establish acceptance limits and agree on sampling frequency (e.g., Cp/Cpk per lot, Δ‑Loss per panel).
  4. Ongoing: Track trends – a drifting Cp or increasing Δ‑Loss warns of process degradation before failure.

Frequently Asked Questions

Q1: Can I ask for all five data points for a small prototype batch?

Yes. Even on prototypes, Dk/Df verification, copper roughness check, and Δ‑Loss coupon are feasible. Cp/Cpk and thermal cycling may be deferred to pilot run, but the supplier should demonstrate they can provide them.

Q2: What if a supplier refuses to share Dk/Df lot data?

That is a red flag. If they cannot provide measured data, they likely do not control incoming material variation. Find another supplier.

Q3: Is Δ‑Loss coupon required for all high‑frequency PCBs?

For any design where insertion loss affects link budget (most RF, mmWave, and 112G+ designs), yes. For simple low‑frequency RF, impedance may be sufficient.

Q4: What Cp/Cpk value should I require for 77GHz radar?

Cp ≥ 1.33, Cpk ≥ 1.2 for ±10% impedance tolerance. If you require ±8% tolerance, demand Cp ≥ 1.67.

Q5: Can thermal cycling be simulated or waived for low‑volume products?

For prototypes, you may waive, but for any product expected to survive field temperature swings, demand thermal cycling data. A failing board is cheaper to catch in test than to recall.

Related Engineering Resources

Why is my 77GHz radar PCB insertion loss higher than simulation?
Copper roughness, Df variation, solder mask effects, and Δ‑loss diagnosis.

Read more →

Quantified effect of copper roughness Ra on 28GHz microstrip loss
Measured data: ED vs HVLP copper, loss comparison, and design rules.

Read more →

Rogers RO4350B vs RO3003 for 77GHz radar
Insertion loss, phase stability, CTE mismatch, and hybrid stack‑ups.

Read more →

SUPPLIER CAPABILITY VERIFICATION

Stop Assuming – Start Verifying

Get a free capability audit including Dk/Df lot review, copper roughness check, and Δ‑Loss coupon design for your high‑frequency PCB project.

Request Free Supplier Capability Review →

PDF checklist | Data point review | Full audit

References: IPC‑TM‑650‑2.5.5.13 (Δ‑Loss), IPC‑TM‑650‑2.5.5.7 (TDR), ISO 25178 (profilometry), IPC‑6018 Class 3 (thermal cycling), IPC‑TM‑650‑2.6.25 (CAF).

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Wei zhang

Wei zhang

the Technical Manager for High-Frequency PCB Business at UltroNiu, brings 15 years of specialized industry experience to the field. He has an in-depth understanding of cutting-edge PCB technologies, including signal integrity optimization and advanced material selection.