Why is my 77GHz radar PCB insertion loss higher than simulation?

2026-05-21


Engineering Summary

At 77 GHz, copper skin depth is ≈0.23 µm. When copper roughness Ra exceeds 0.8 µm, conductor loss increases by 20–40% compared with HVLP copper. A dielectric loss tangent (Df) variation of ±0.001 adds ~0.15 dB/cm loss. Solder mask over microstrip lines adds another 0.1–0.2 dB/cm.

Loss Impact Summary at 77GHz

FactorTypical deviationInsertion loss impact
Copper roughness (ED vs HVLP)Ra 2.0 µm → <0.6 µm+0.3 to +0.6 dB/cm
Dielectric Df variation±0.001+0.1 to +0.2 dB/cm
Solder mask on microstrip20–30 µm, Dk≈3.5+0.1 to +0.2 dB/cm
Etch tolerance (±10–15 µm)geometry shiftimpedance mismatch + additional loss

1. Copper Roughness – The Dominant Factor

At 77 GHz, skin depth in copper is only ≈0.23 µm. Current flows in an ultra‑thin surface layer – any roughness amplifies the effective path length and resistance.

Copper typeTypical Ra (µm)Relative loss at 77GHz
ED copper1.8–2.5baseline + 0.3–0.6 dB/cm
Low‑profile ED1.0–1.4baseline + 0.15–0.3 dB/cm
RTF0.6–1.0baseline + 0.05–0.15 dB/cm
HVLP / VLP<0.6reference (lowest loss)

What simulation assumes: perfectly smooth copper. 
Reality: most fabricators use ED copper unless specified otherwise.

UltroNiu practice: We always specify HVLP copper for mmWave RF layers and verify roughness with profilometry (ISO 25178).

2. Dielectric Df Variation

Laminate datasheets quote typical Df at 10 GHz. At 77 GHz, Df can vary by ±0.0005 to ±0.001 between lots. A Df increase of 0.001 adds ≈0.15 dB/cm loss. Phase stability also degrades with Dk variation.

What simulation assumes: fixed Df from datasheet. 
Reality: your production lot may have higher Df.

UltroNiu practice: We perform lot‑acceptance Dk/Df verification using T‑resonator coupons (IPC‑TM‑650‑2.5.5.13) before production.

3. Etch Tolerance and Geometry Distortion

At 77GHz, a 10 µm deviation in line width changes impedance by 2–3 Ω and also affects loss.

ParameterTypical fabrication toleranceImpact at 77GHz
Outer layer trace width±15 µmimpedance shift + mismatch loss
Copper profiletrapezoidalfield distortion

What simulation assumes: ideal rectangular cross‑section. 
Reality: etching creates trapezoidal profiles with undercut.

UltroNiu practice: LDI (laser direct imaging) + etch compensation models reduce width variation to ±10 µm.

4. Solder Mask and Surface Finish Effects

Solder mask over microstrip lines acts as an extra dielectric layer (Dk≈3.5, thickness 20–30 µm), adding 0.1–0.2 dB/cm loss. ENIG surface finish introduces nickel (low conductivity) and additional roughness. For mmWave, ENEPIG or bare copper (OSP) is preferred.

What simulation assumes: clean copper, no coating. 
Reality: most boards have solder mask covering RF lines.

UltroNiu practice: We remove solder mask from all mmWave transmission lines and recommend ENEPIG or OSP for critical RF paths.

5. Launch and Via Discontinuities

Even a perfect line can fail if the launch or via transition is not optimized. Common issues: via stub resonance, connector pad mismatch, reference plane discontinuity. These add reflection loss and ripple, often misinterpreted as “excess insertion loss”.

UltroNiu practice: Every design receives a launch and via review. We use TDR and VNA to validate transitions on representative coupons.

How to Diagnose – Step‑by‑Step Workflow

StepMethodWhat it reveals
1Profilometry (ISO 25178)Copper roughness (Ra, Rz)
2T‑resonator couponDielectric Df at 77GHz
3∆‑Loss couponIsolate contribution of copper, mask, or vias
4TDR (Time Domain Reflectometry)Impedance discontinuities
5VNA S‑parameters (2‑port)Full loss and match characterization

UltroNiu standard: We provide ∆‑Loss coupon data with every mmWave panel – not just a pass/fail report.

Design Fix Checklist (for your next revision)

Material & Copper

Layout

  • Remove solder mask from all mmWave transmission lines
  • Minimize via count on critical nets
  • Use backdrilling for through‑vias that cannot be avoided
  • Match connector launch geometry to line impedance

Manufacturing

  • Require LDI imaging for finer line accuracy
  • Specify etch compensation for your copper weight
  • Demand impedance coupons (±10% or tighter)
  • Include ∆‑Loss coupons that replicate your actual line length and transitions

Engineering Validation Workflow for Production

A production‑ready 77GHz radar PCB must pass:

  • Material lot verification – Df within specification
  • Impedance test – TDR on every panel
  • ∆‑Loss measurement – compare reference vs test line
  • S‑parameter check – insertion loss < budget at 77GHz
  • Thermal cycling (optional) – if field temperature range is wide

Only then is the board ready for volume deployment.

FAQ

Q1: Can I use FR‑4 for a 77GHz radar PCB?

No. FR‑4 Df is typically 0.015–0.020, causing >2 dB/cm loss – completely unacceptable for mmWave radar.

Q2: How much insertion loss is acceptable for a 77GHz antenna feed line?

Depends on link budget, but typically <0.5 dB/cm is practical. With HVLP copper and proper design, 0.2–0.3 dB/cm is achievable.

Q3: Does removing solder mask really help?

Yes. At 77GHz, a 25 µm solder mask adds 0.1–0.2 dB/cm loss. Remove it from all RF lines.

Q4: My simulation uses correct Dk/Df from datasheet – why still higher loss?

Datasheet values are typical at 10 GHz. Your production lot may have different Df, and temperature/frequency dispersion changes material behavior at 77GHz. Always request lot‑specific characterization.

Related Engineering Resources

Rogers RO4350B vs RO3003 for 77GHz
Insertion loss, phase stability, hybrid stack-up design.

Read more →

Copper Roughness & 28GHz Loss
Measured impact of HVLP vs ED copper.

Read more →

Why RF Engineers Choose UltroNiu
Material governance, Δ‑Loss testing, and RF engineering support.

Read more →

STOP GUESSING. START MEASURING.

Free Engineering Review for Your 77GHz Design

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PDF checklist | Stackup review | Full audit

References: IPC‑TM‑650‑2.5.5.13 (T‑resonator), ISO 25178 (profilometry), Rogers RO3003 datasheet, IPC‑6018 Class 3.

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Wei zhang

Wei zhang

the Technical Manager for High-Frequency PCB Business at UltroNiu, brings 15 years of specialized industry experience to the field. He has an in-depth understanding of cutting-edge PCB technologies, including signal integrity optimization and advanced material selection.