Engineering Summary
Insertion loss is the attenuation of a signal as it travels through a PCB transmission line, expressed in dB per unit length (e.g., dB/cm or dB/in).
Must be tightly controlled when:
- ·Link budget margin is tight – e.g., 112G PAM4, 77GHz radar, satellite downlinks
- ·Channel length exceeds a few centimeters – loss accumulates with distance
- ·Operating frequency >10 GHz – dielectric and conductor loss rise sharply
- ·Multiple channels must match – mismatched loss creates amplitude and phase errors in phased arrays
- ·Production repeatability is required – uncontrolled loss variation causes field failures
Rule of thumb: If your link budget allows less than 3 dB total loss, you must actively control insertion loss through material selection, copper roughness, and process validation.
1. What Is PCB Insertion Loss? (Definition & Units)
Insertion loss (IL) is the reduction in signal power when it passes from the input to the output of a PCB transmission line (microstrip, stripline, coplanar waveguide). It includes all loss mechanisms:
- Dielectric loss – energy dissipated in the laminate material (Df, loss tangent)
- Conductor loss – energy lost in copper traces (skin effect, surface roughness)
- Radiation loss – energy that leaks from the line (especially microstrip)
- Reflection loss – energy reflected back due to impedance discontinuities
Insertion loss is typically expressed in decibels per unit length (dB/cm or dB/in) and is frequency‑dependent. A typical specification might be: ≤0.5 dB/cm at 28 GHz for a microstrip line on low‑loss material.
Engineering fact
At low frequencies (<1 GHz), insertion loss is often negligible. At mmWave (>20 GHz), it becomes the dominant factor limiting channel length and system performance.
2. How Insertion Loss Is Measured
| Method | Equipment | Principle | Typical accuracy |
|---|---|---|---|
| Direct VNA | Vector Network Analyzer | Measure S21 (transmission coefficient) over frequency | ±0.05 dB |
| Δ‑Loss coupon | VNA + two lines of different length | Subtracts launch/connector effects; isolates PCB loss | ±0.02 dB |
| TDR + transform | Time Domain Reflectometer | Indirectly derives loss from impedance profile | Lower accuracy for loss |
| Resonator method | VNA + resonant structure | Extracts loss tangent (Df) from Q‑factor | High, but narrowband |
Recommended for production: Δ‑Loss coupon (IPC‑TM‑650‑2.5.5.13) because it removes connector and launch variation, giving true PCB‑only loss data.
3. When Must Insertion Loss Be Tightly Controlled?
Not every PCB needs tight insertion loss control. The requirement depends on three factors:
| Factor | Loose control acceptable | Tight control required |
|---|---|---|
| Operating frequency | <5 GHz | >10 GHz, especially >20 GHz |
| Channel length | <2 cm | >5 cm (loss accumulates) |
| Link margin | >6 dB headroom | <3 dB headroom (e.g., 112G PAM4, radar) |
| Channel matching | Single‑ended, uncritical | Phased arrays, multi‑lane SerDes |
| Production volume | Low, rework possible | High, field replacement impossible |
Specific applications that require tight insertion loss control:
| Application | Why loss matters | Typical loss budget |
|---|---|---|
| 77GHz automotive radar | Every 0.1 dB reduces detection range | <0.5 dB/cm |
| 112G PAM4 backplane | Loss quickly closes eye diagram | <10 dB total per channel |
| 5G mmWave front‑end (28/39 GHz) | Link budget very tight | <1 dB total for short runs |
| Phased‑array antenna | Mismatched loss → beam distortion | Channel‑to‑channel loss variation <0.2 dB |
| Satellite downlink | No repair possible | Extremely tight, verified per lot |
| Medical imaging (MRI, ultrasound) | Signal‑to‑noise ratio directly affects image quality | Low loss, stable over temperature |
Rule of thumb: If your design uses low‑loss laminate (Rogers, Megtron, PTFE) and operates above 10 GHz, you should specify insertion loss limits and verify them with coupons.
4. The Two Main Loss Components: Dielectric vs Conductor
4.1 Dielectric Loss
Caused by polarization of the laminate material. Quantified by dissipation factor (Df). Low Df → low dielectric loss. Dielectric loss increases linearly with frequency.
| Material class | Df at 10 GHz | Relative dielectric loss |
|---|---|---|
| Standard FR‑4 | 0.015‑0.020 | High (unsuitable above 5 GHz) |
| High‑speed FR‑4 (e.g., Megtron 4) | 0.008‑0.010 | Moderate |
| Low‑loss (e.g., Megtron 6) | 0.002‑0.004 | Low |
| Ultra‑low loss (e.g., RO3003, PTFE) | 0.001‑0.0015 | Very low |
Engineering fact: A Df increase of 0.001 adds approximately 0.15 dB/cm loss at 28 GHz and 0.4 dB/cm at 77 GHz (assuming microstrip).
4.2 Conductor Loss
Caused by resistance of copper traces, amplified by skin effect and surface roughness. Skin depth decreases with frequency: at 28 GHz ≈0.39 µm, at 77 GHz ≈0.23 µm. Rough copper (Ra >0.8 µm) increases effective path length → higher loss.
| Copper type | Ra (µm) | Relative conductor loss at 28GHz |
|---|---|---|
| HVLP / VLP | <0.6 | Baseline |
| RTF | 0.6‑1.0 | +5‑10% |
| Low‑profile ED | 1.0‑1.4 | +15‑25% |
| Standard ED | 1.8‑2.5 | +30‑50% |
Key takeaway: At mmWave, copper roughness is as important as dielectric loss. Using HVLP copper can reduce total insertion loss by 20‑40% compared to ED copper.
5. How to Specify Insertion Loss on Your Fabrication Drawing
Do not write generic statements like “low loss required.” Be explicit:
- Reference line length: 50 mm, 50 Ω microstrip on RO4350B
- Copper type: HVLP on RF layers, Ra ≤0.6 µm (profilometry verification)
- Solder mask: removed over all RF transmission lines
- Sample size: one coupon per production panel
- Acceptance criteria: mean IL ≤0.42 dB/cm, no single coupon >0.46 dB/cm
UltroNiu practice: We treat insertion loss as a measured parameter, not an assumption. Every mmWave panel includes Δ‑Loss coupons, and we provide the measured data with shipment.
6. Insertion Loss Budget Example (28GHz 5G Front‑End)
Assume a 30 mm microstrip line from transceiver to antenna.
| Component | Loss (dB) | Notes |
|---|---|---|
| Transceiver output to PCB launch | 0.2 | Connector + launch mismatch |
| PCB trace (30mm × 0.6 dB/cm) | 1.8 | Requires low‑loss material |
| Antenna feed transition | 0.3 | Match optimization |
| Total loss | 2.3 | Must be <3 dB for link budget |
If the PCB trace alone exceeds 2.0 dB (e.g., 0.8 dB/cm × 3 cm = 2.4 dB), the link fails. That is why you must control loss per centimeter, not just total loss after the fact.
7. Common Mistakes That Inflate Insertion Loss
| Mistake | Impact | Fix |
|---|---|---|
| Using standard ED copper | +0.2‑0.5 dB/cm at mmWave | Specify HVLP/VLP |
| Leaving solder mask on RF lines | +0.1‑0.2 dB/cm | Remove mask over traces |
| Ignoring material Df lot variation | ±0.1‑0.2 dB/cm drift | Incoming Df verification |
| Relying only on impedance coupons | Misses loss entirely | Add Δ‑Loss coupons |
| Using ENIG finish on RF pads | Adds loss (nickel layer) | Use ENEPIG or OSP |
8. When Insertion Loss Control Is Less Critical
You may not need tight insertion loss control when:
- Frequency <3 GHz – loss is low even with FR‑4
- Trace length <2 cm – total loss under 0.2 dB
- Link budget has >6 dB margin – variation is tolerable
- Single‑ended, non‑critical signals (e.g., control, I2C, GPIO)
- Low‑volume prototypes that will be manually tuned
But be careful: even low‑frequency designs with long traces (e.g., power supply sense lines) can suffer if loss is ignored. Always calculate, don’t assume.
9. Frequently Asked Questions
Q1: What is the difference between insertion loss and return loss?
Insertion loss (S21) measures how much signal power is lost through the line. Return loss (S11) measures how much is reflected back due to impedance mismatch. Both matter; insertion loss affects amplitude, return loss affects reflection and standing waves.
Q2: Can I estimate insertion loss from impedance coupon data?
No. Impedance coupons confirm geometry but do not directly measure loss. You need a dedicated Δ‑Loss coupon or VNA measurement.
Q3: How often should insertion loss be tested in production?
For high‑reliability mmWave products, test every panel (using coupons). For less critical designs, test per lot or per shift.
Q4: What is a good insertion loss value for 112G PAM4 channels?
Total loss per channel (including connectors, vias, and traces) is typically budgeted at 15‑20 dB. PCB trace loss alone should be <10 dB. At 28 GHz, that translates to <0.5 dB/cm for a 20 cm backplane.
Q5: Can I reduce insertion loss by making traces wider?
Wider traces lower conductor loss, but they also change impedance and may increase crosstalk. There is an optimum width; beyond that, dielectric loss dominates. Always simulate.
Related Engineering Resources
References: IPC‑TM‑650‑2.5.5.13 (Δ‑Loss), IPC‑TM‑650‑2.5.5.7 (TDR), ISO 25178 (profilometry), Rogers, Panasonic material datasheets.
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